1
Three Dimensional Integrated Circuit Design: EDA, Design and Microarchitectures

Three Dimensional Integrated Circuit Design: EDA, Design and Microarchitectures

Kerry Bernstein (auth.), Yuan Xie, Jason Cong, Sachin Sapatnekar (eds.)
Рік:
2010
Мова:
english
Файл:
PDF, 9.42 MB
0 / 0
english, 2010
2
Three Dimensional Integrated Circuit Design: EDA, Design and Microarchitectures

Three Dimensional Integrated Circuit Design: EDA, Design and Microarchitectures

Kerry Bernstein (auth.), Yuan Xie, Jason Cong, Sachin Sapatnekar (eds.)
Рік:
2010
Мова:
english
Файл:
PDF, 6.51 MB
0 / 0
english, 2010
4
Timing Analysis and Optimization of Sequential Circuits

Timing Analysis and Optimization of Sequential Circuits

Naresh Maheshwari, Sachin S. Sapatnekar (auth.)
Рік:
1999
Мова:
english
Файл:
PDF, 6.34 MB
0 / 0
english, 1999
5
Layout Optimization in VLSI Design

Layout Optimization in VLSI Design

Hung-Ming Chen, Martin D. F. Wong, Hai Zhou (auth.), Bing Lu, Ding-Zhu Du, Sachin S. Sapatnekar (eds.)
Рік:
2001
Мова:
english
Файл:
PDF, 15.96 MB
0 / 0
english, 2001
6
Design Automation for Timing-Driven Layout Synthesis

Design Automation for Timing-Driven Layout Synthesis

Sachin S. Sapatnekar, Sung-Mo Kang (auth.)
Рік:
1993
Мова:
english
Файл:
PDF, 18.27 MB
0 / 0
english, 1993